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| ID | Category | Severity | Date Submitted | Last Update | |||
| 0001499 | [SystemVerilog P1800] V-1364 | text | 2006-06-07 04:06 | 2008-01-10 02:51 | |||
| Reporter | shalom | View Status | public | ||||
| Assigned To | shalom | ||||||
| Priority | immediate | Resolution | fixed | ||||
| Status | closed | Product Version | |||||
| Summary | 0001499: 1364 12.3.4: awkward text | ||||||
| Description |
In 1364-2005, 12.3.4, the first sentence of the second paragraph says, "Each declared port provides the complete information about the port." This is awkward. It is not the port that provides the information about the port, it is the port declaration. Change this text to, "Each port declaration provides the complete information about the port." |
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| Additional Information | |||||||
| Tags | No tags attached. | ||||||
| Type | Errata | ||||||
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